MULTILYNX cl2151 universal hfc interactive cable transceiver the communications company tm cl 2151 in-band tuner adc ts switch ts demux annex b fec annex a fec annex b fec annex a fec docsis pre-process dvs 178 fec fec encode davic oob fec davic oob framer davic dvb-rc mac/sar des enc cpu & dsp bus interface unit stb host (pod cpu interface) copy/crc engine sdram control sdram upstream docsis mac downstream mac processor des dec optional pod module qam demod qam/ qpsk demod qam16/ qpsk mod amp control slic i/f spi idc uart gpio adc oob tuner diplexer vga high-level block diagram of MULTILYNX cl2151 overview the MULTILYNX cl2151 is a universal cable transceiver solution for advanced set-top boxes (stb) and cable modems compliant with dvb/davic, and docsis standards. the cl2151 is built for stb and cable-modem manufacturers requiring the maximum performance with the lowest system bom cost. its high level of integration provides manufacturers with a flexible, yet quick time-to-market solution for standards- based deployments all over the world. the cl2151 is a complete and highly integrated solution combining a 16-256 qam in-band receiver, qpsk/qam receiver for out-of-band downstream reception, a qpsk/16-qam burst transmitter, and a proven davic/dvb and docsis 1.0/1.1 media access controller (mac). the chip includes a risc processor with a dsp instruction set enabling glueless interface to subscriber line ics (slics) and a pod interface. the cl2151 inband demodulator is a 16-256 qam. a second out-of-band downstream channel provides an option to use a qpsk or full 16-256 qam demodu- lation, allowing for flexible implementation for docsis, dvb/davic or dvs 178 without changing any external components. both channels are compliant with itu j.83 annex a, b, and c and integrate a 10-bit a/d converter. the upstream qpsk/16-qam burst transmitter along with itu j.112 annex a, b compliant fec encoding provides a robust and cost-effective solution for dvb/davic, and docsis applications. the hardware mac (with packet parsing, filtering, and decryption), and the two internal processors ?an 88 mhz mini-risc and 117 mhz sparc v8 processor, upon which the standard specific mac software is executed ?allow for flexible implementation of dvb in-band, docsis, or eurodocsis standards. interface features: opencable compliant by supporting oob data to be bypassed to a pod interface for mac processing phy des implementation for physical security compliant to the opencable and dvb standards powerful sparc v8 internal processor offloads the stb host processor from the mac software tasks and provides a dsp capability for ip telephony applications internal processor includes a dsp instruction set necessary for ip telephony applications delivers a video telephony solution simply by adding ulaw or alaw audio codec, aslic chipset and an mpeg video source encoder/decoder
MULTILYNX cl2151 universal hfc interactive cable transceiver the communications company tm for more information please call: lsi logic corporation north american headquarters, milpitas, ca tel: 800 574 4286 north america milpitas, ca usa phone: 1-408-490-8000 fax: 1-408-490-8590 quebec, canada phone: 1-514-426-5011 fax: 1-514-426-7119 europe crawley, west sussex united kingdom phone: 44-1293-651100 fax: 44-1293-651119 china beijing, china phone: 86-10-626-38296 fax: 86-10-626-38322 chengdu, china phone: 86-28-6713-150 fax: 86-28-6713-694 japan kohoku-ku, yokohama kanagawa japan phone: 81-45-474-7571 fax: 81-45-474-7570 korea seoul, korea phone: 822-561-9011 fax: 822-561-9021 taiwan taipei, taiwan phone: 886-22-517-4938 fax: 886-22-517-4937 lsi logic logo design and MULTILYNX are trademarks of lsi logic corporation. all other brand and product names may be trademarks of their respective companies. lsi logic corporation reserves the right to make changes to any products and services herein at any time without notice. lsi logic does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by lsi logic; nor does the purchase, lease, or use of a product or service from lsi logic convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of lsi logic or of third parties. copyright ?2001 by lsi logic corporation. all rights reserved. order no. i20082 1101.1k.jc.xx - printed in usa in band receiver standards compliance dvb-c, itu? j.83 annexes a, b, and c a/d converter internal 10-bit symbol rate variable from 1 ?7.2 mbaud qam constellations 16, 32, 64, 128, 256 qam (including davic 256 qam map) if input frequencies 36 mhz or 44 mhz if inputs output multiplexed transport stream output with forward channel additional i/o point of deployment (pod) mpeg out to pod, in from pod, and out to demux* forward interactive channel standards compliance dvb-rc, itut j.83 annexes a, b, and c davic 1.2 part 8, section 7.8; dvs 167, dvs 178 a/d converter internal 10-bit symbol rate variable from 0.772 ?7.2 mbaud qam constellations 16,32,64,128,256 qam (including davic 256 qam map) qpsk differential decoding if input frequencies 36 mhz or 44 mhz if inputs output multiplexed transport stream output with broadcast channel to media access control units additional i/o point of deployment (pod) rx bypass signals return channel standards compliance itut j.112 annexes a and b; dvb-rc/davic, docsis 1.0 and docsis 1.1, dvs 167, dvs 178 d/a converter internal 10-bit rf output 5 mhz to 65 mhz modulation qpsk and 16 qam docsis 1.0 features advanced modem pre-equalization of transmit signal internal cmts clock synchronization: no vcxo additional features programmable rs encoding (t=010; k=16 253) programmable randomization programmable unique word/preamble internal slot timing and burst control analog and digital gain control additional i/o point of deployment (pod) tx bypass signals processor and control internal microprocessor 117 mhz sparc v8 processor for media access control software clock generation onboard pll running from a single external crystal agc output supports many variable gain amplifier devices, including, but not limited to: analog devices ad8321, lucent technologies v4911, anadigics ara05050 and ara 1400, maxim max3501 tuner control implemented via spi, idc, or gpio peripherals interface modules inter-device communications (idc, mastermode only), on-chip uart, serial peripheral interface (spi), pcm/slic interface*, general purpose i/o (gpio) mac standards compliance docsis 1.0/1.1; dvb-rc/davic; davic oob , dvs 167; dvb inband; davic inband, dvs 178 host slave mode pci, power pc, coldfire (5206, 5307), 68k, sh3/4 master mode coldfire, 68k, async flash physical input voltage 3.3v + 5% (tolerates 5v inputs, except sdram), 1.8v packaging 208-pin pqfp; 308-pin bga sparc operating frequency 117 mhz or 88 mhz * available only in 308 pin bga package
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